谁会编译群晖引导，帮忙编译一个带螃蟹2.5g的ds920引导

这个你编译一次就可以自动生成dts文件啊，dts文件可以编辑，然后转换成dtb的二进制文件，dtb也可以重新转换成dts文件在进行编辑的

 

我是两个，一个主板带的，一个nvme转接板转的
估计是参数填错了
你登录群晖用下面这个命令查看你识别不了的硬盘再改到dts试试
cat /sys/block/sataX/device/syno_block_info
(sataX的X就是1，2，3，4，5，6之类的，可以用ls /sys/block/sata*确定)
输出大概是
pciepath=00:17.0
ata_port_no=0
driver=ahci

 

dtb是引导里面带的，首次下载的话你先编译一次就会自动下载了，然后修改后再编译一次

 

查过了，一样，主板自带和NVME转接卡，但就是主板自带的识别不出来，方便放dts文件我参考参考吗？我对比下看看

 

我和你一样，redpill-tool-chain，tinycore-redpill，这些都试过了，只能看到两个硬盘，还有的看不到。

 

你是什么cpu,我是j3455

 

N5095，你把这段代码的结果贴上来看看，不超过四个盘位应该是很好解决的。
用ls /sys/block/sata*确定有几个接口，然后执行
cat /sys/block/sataX/device/syno_block_info
sataX的X就是1，2，3，4，5，6之类的

 

/dev/sata1 /dev/sata1p3 /dev/sata2p2 /dev/sata3p1 /dev/sata4p1
/dev/sata1p1 /dev/sata2 /dev/sata2p3 /dev/sata3p2 /dev/sata4p2
/dev/sata1p2 /dev/sata2p1 /dev/sata3 /dev/sata4

$ cat /sys/block/sata1/device/syno_block_info
pciepath=00:12.0
ata_port_no=0
driver=ahci
$ cat /sys/block/sata2/device/syno_block_info
pciepath=00:12.0
ata_port_no=1
driver=ahci
$ cat /sys/block/sata3/device/syno_block_info
pciepath=00:13.2,00.0
ata_port_no=0
driver=ahci
$ cat /sys/block/sata4/device/syno_block_info
pciepath=00:13.2,00.0
ata_port_no=1
driver=ahci
$ cat /sys/block/sata5/device/syno_block_info
cat: /sys/block/sata5/device/syno_block_info: No such file or directory

这个要怎么搞？

 

代码:

/dts-v1/;

/ {
    compatible = "Synology";
    model = "synology_geminilake_920+";
    version = <0x01>;
    syno_spinup_group = <0x02 0x01 0x01>;
    syno_spinup_group_delay = <0x0b>;
    syno_hdd_powerup_seq = "true";
    syno_cmos_reg_secure_flash = <0x66>;
    syno_cmos_reg_secure_boot = <0x68>;

    DX517 {
        compatible = "Synology";
        model = "synology_dx517";

        pmp_slot@1 {

            libata {
                EMID = <0x00>;
                pmp_link = <0x00>;
            };
        };

        pmp_slot@2 {

            libata {
                EMID = <0x00>;
                pmp_link = <0x01>;
            };
        };

        pmp_slot@3 {

            libata {
                EMID = <0x00>;
                pmp_link = <0x02>;
            };
        };

        pmp_slot@4 {

            libata {
                EMID = <0x00>;
                pmp_link = <0x03>;
            };
        };

        pmp_slot@5 {

            libata {
                EMID = <0x00>;
                pmp_link = <0x04>;
            };
        };
    };

    internal_slot@1 {
        protocol_type = "sata";
        power_pin_gpio = <0x14 0x00>;
        detect_pin_gpio = <0x23 0x01>;
        led_type = "lp3943";

        ahci {
            pcie_root = "00:12.0";
            ata_port = <0x00>;
        };

        led_green {
            led_name = "syno_led0";
        };

        led_orange {
            led_name = "syno_led1";
        };
    };

    internal_slot@2 {
        protocol_type = "sata";
        power_pin_gpio = <0x15 0x00>;
        detect_pin_gpio = <0x24 0x01>;
        led_type = "lp3943";

        ahci {
            pcie_root = "00:12.0";
            ata_port = <0x01>;
        };

        led_green {
            led_name = "syno_led2";
        };

        led_orange {
            led_name = "syno_led3";
        };
    };

    internal_slot@3 {
        protocol_type = "sata";
        power_pin_gpio = <0x16 0x00>;
        detect_pin_gpio = <0x25 0x01>;
        led_type = "lp3943";

        ahci {
            pcie_root = "00:13.2,00.0";
            ata_port = <0x00>;
        };

        led_green {
            led_name = "syno_led4";
        };

        led_orange {
            led_name = "syno_led5";
        };
    };

    internal_slot@4 {
        protocol_type = "sata";
        power_pin_gpio = <0x17 0x00>;
        detect_pin_gpio = <0x26 0x01>;
        led_type = "lp3943";

        ahci {
            pcie_root = "00:13.2,00.0";
            ata_port = <0x01>;
        };

        led_green {
            led_name = "syno_led6";
        };

        led_orange {
            led_name = "syno_led7";
        };
    };

    esata_port@1 {

        ahci {
            pcie_root = "00:13.0,00.0";
            ata_port = <0x03>;
        };
    };

    usb_slot@1 {

        vbus {
            syno_gpio = <0x1d 0x01>;
        };

        usb2 {
            usb_port = "1-1";
        };

        usb3 {
            usb_port = "2-1";
        };
    };

    usb_slot@2 {

        vbus {
            syno_gpio = <0x1e 0x01>;
        };

        usb2 {
            usb_port = "1-2";
        };

        usb3 {
            usb_port = "2-2";
        };
    };

    nvme_slot@1 {
        pcie_root = "00:14.1";
        port_type = "ssdcache";
    };

    nvme_slot@2 {
        pcie_root = "00:14.0";
        port_type = "ssdcache";
    };
};

 

我就是这样的，只是修改这个部分。还是没用，只认两块盘
pcie_root = "00:12.0";
ata_port = <0x01>;

pcie_root = "00:13.2,00.0";
ata_port = <0x01>;