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TS453Dmini引导分享DS920+ v7.0.1和v7.1.0,完美识别硬盘,顺序正常。

本帖由 SoraLike2022-05-01 发布。版面名称:群晖 Synology DSM

  1. fwhub

    fwhub New Member

    注册:
    2021-08-20
    帖子:
    25
    好的 我还是想问一下这个编译引导的问题 我这边改了还是只识别后两个硬盘 一点没变 能帮忙看下我的操作步骤有啥问题吗?
    1、./rploader.sh ext geminilake-7.1.0-42661 add https://raw.githubusercontent.com/pocopico/rp-ext/main/r8125/rpext-index.json
    2、./rploader.sh serialgen DS920xs 获取SN
    3、./rploader.sh identifyusb now 获取vidpid
    4、./rploader.sh satamap now
    5、./rploader.sh build geminilake-7.0.1-42281编译7.01
    6、修改dts文件 sataport 拷贝回去 修改脚本
    7、./rploader.sh build geminilake-7.1.0-42661 编译7.1
    8、sudo filetool.sh -b 存盘
     
  2. fwhub

    fwhub New Member

    注册:
    2021-08-20
    帖子:
    25
    编译要把硬盘拔下来是因为什么呢?
     
  3. SoraLike

    SoraLike Member

    注册:
    2018-04-05
    帖子:
    46
    他误导你了。。。和硬盘的插拔无关系,
    也不需要./rploader.sh satamap now, 这玩意生成的是错的
    下面是正确的dts

    代码:
    /dts-v1/;
    
    / {
        compatible = "Synology";
        model = "synology_geminilake_920+";
        version = <0x1>;
        syno_spinup_group = <0x2 0x1 0x1>;
        syno_spinup_group_delay = <0xb>;
        syno_hdd_powerup_seq = "true";
        syno_cmos_reg_secure_flash = <0x66>;
        syno_cmos_reg_secure_boot = <0x68>;
    
        DX517 {
            compatible = "Synology";
            model = "synology_dx517";
    
            pmp_slot@1 {
    
                libata {
                    EMID = <0x0>;
                    pmp_link = <0x0>;
                };
            };
    
            pmp_slot@2 {
    
                libata {
                    EMID = <0x0>;
                    pmp_link = <0x1>;
                };
            };
    
            pmp_slot@3 {
    
                libata {
                    EMID = <0x0>;
                    pmp_link = <0x2>;
                };
            };
    
            pmp_slot@4 {
    
                libata {
                    EMID = <0x0>;
                    pmp_link = <0x3>;
                };
            };
    
            pmp_slot@5 {
    
                libata {
                    EMID = <0x0>;
                    pmp_link = <0x4>;
                };
            };
        };
    
        internal_slot@1 {
            protocol_type = "sata";
            power_pin_gpio = <0x14 0x0>;
            detect_pin_gpio = <0x23 0x1>;
            led_type = "lp3943";
    
            ahci {
                pcie_root = "00:13.0,00.0";
                ata_port = <0x0>;
            };
    
            led_green {
                led_name = "syno_led0";
            };
    
            led_orange {
                led_name = "syno_led1";
            };
        };
    
        internal_slot@2 {
            protocol_type = "sata";
            power_pin_gpio = <0x15 0x0>;
            detect_pin_gpio = <0x24 0x1>;
            led_type = "lp3943";
    
            ahci {
                pcie_root = "00:13.0,00.0";
                ata_port = <0x1>;
            };
    
            led_green {
                led_name = "syno_led2";
            };
    
            led_orange {
                led_name = "syno_led3";
            };
        };
    
        internal_slot@3 {
            protocol_type = "sata";
            power_pin_gpio = <0x16 0x0>;
            detect_pin_gpio = <0x25 0x1>;
            led_type = "lp3943";
    
            ahci {
                pcie_root = "00:12.0";
                ata_port = <0x0>;
            };
    
            led_green {
                led_name = "syno_led4";
            };
    
            led_orange {
                led_name = "syno_led5";
            };
        };
    
        internal_slot@4 {
            protocol_type = "sata";
            power_pin_gpio = <0x17 0x0>;
            detect_pin_gpio = <0x26 0x1>;
            led_type = "lp3943";
    
            ahci {
                pcie_root = "00:12.0";
                ata_port = <0x1>;
            };
    
            led_green {
                led_name = "syno_led6";
            };
    
            led_orange {
                led_name = "syno_led7";
            };
        };
    
        esata_port@1 {
    
            ahci {
                pcie_root = "00:13.0,00.0";
                ata_port = <0x2>;
            };
        };
    
        usb_slot@1 {
    
            vbus {
                syno_gpio = <0x1d 0x1>;
            };
    
            usb2 {
    usb_port = "1-4";
            };
    
            usb3 {
                usb_port = "2-1";
            };
        };
    
        usb_slot@2 {
    
            vbus {
                syno_gpio = <0x1e 0x1>;
            };
    
            usb2 {
                usb_port = "1-2";
            };
    
            usb3 {
                usb_port = "2-2";
            };
        };
    
        nvme_slot@1 {
            pcie_root = "00:14.1";
            port_type = "ssdcache";
        };
    
        nvme_slot@2 {
            pcie_root = "00:14.0";
            port_type = "ssdcache";
        };
    };
    
    
     
  4. fwhub

    fwhub New Member

    注册:
    2021-08-20
    帖子:
    25
    就是我刚才的步骤去掉生成satamap就对了是吗? 我看了配置文件和我改的是一样的 estat 和 usb2不一样 这两个是自动获取的吗 还是修改出来的 可能是一直二次编译的原因把 稍等我试一下重新编译
     
  5. lanse

    lanse New Member

    注册:
    2019-09-26
    帖子:
    28
    继续跟进 我在留意 一键编译不靠谱
     
  6. ghxwzbc

    ghxwzbc New Member

    注册:
    2022-04-24
    帖子:
    22
    不好意思,我的配置文件是给错了,没注意到是2个sata控制器,按楼主给的编译吧,试试如果编译过后redpill-load/ds920p.dts的文件内容有没有变动,如果没有变就不用拔硬盘
     
  7. fwhub

    fwhub New Member

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    2021-08-20
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    25
    哪里来的一键编译?你是指那个m.sh的脚本吗?
     
  8. myd2898129

    myd2898129 Member

    注册:
    2022-04-18
    帖子:
    50
    图挂了,楼主,你具体说的是删除哪段代码
     
  9. SoraLike

    SoraLike Member

    注册:
    2018-04-05
    帖子:
    46
    图没挂。你得有'TI-子'。。
     
  10. myd2898129

    myd2898129 Member

    注册:
    2022-04-18
    帖子:
    50
    这就尴尬了,我没有呢,老哥,可不可以把删除的具体代码贴出来
     
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